JOINT ELECTRONIC DEVICE ENGINEERING COUNCIL/JEDEC/CASE OUTLINE DESIGNATION | SOT-23 |
INTERNAL CONFIGURATION | JUNCTION CONTACT |
III SEMICONDUCTOR MATERIAL | SILICON |
INCLOSURE MATERIAL | METAL |
POWER RATING PER CHARACTERISTIC | 350.0 MILLIWATTS SMALL-SIGNAL INPUT POWER, COMMON-COLLECTOR ABSOLUTE |
PROPRIETARY CHARACTERISTICS | PACS |
MAXIMUM OPERATING TEMP PER MEASUREMENT POINT | 150.0 DEG CELSIUS JUNCTION |
MOUNTING METHOD | TERMINAL |
OVERALL HEIGHT | 0.0470 INCHES MAXIMUM |
OVERALL LENGTH | 0.1200 INCHES MAXIMUM |
OVERALL WIDTH | 0.0984 INCHES MAXIMUM |
SPECIAL FEATURES | JUNCTION PATTERN ARRANGEMENT: NPN |
VOLTAGE RATING IN VOLTS PER CHARACTERISTIC | 180.0 MAXIMUM COLLECTOR TO BASE VOLTAGE/STATIC/EMITTER OPEN AND 160.0 MAXIMUM COLLECTOR TO EMITTER VOLTAGE/STATIC/BASE OPEN AND 6.0 MAXIMUM EMITTER TO BASE VOLTAGE, STATIC, COLLECTOR OPEN |
TERMINAL TYPE AND QUANTITY | 3 PRINTED CIRCUIT |
CURRENT RATING PER CHARACTERISTIC | 600.00 MILLIAMPERES SOURCE CUTOFF CURRENT MAXIMUM |