BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM |
BODY LENGTH | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM |
BODY WIDTH | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM |
CASE OUTLINE SOURCE AND DESIGNATOR | T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
DESIGN FUNCTION AND QUANTITY | 1 FLIP-FLOP, R-S, CLOCKED AND 1 FLIP-FLOP, R-S, MASTER SLAVE |
FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND DC COUPLED AND NEGATIVE EDGE TRIGGERED AND RESETTABLE AND W/ENABLE |
INCLOSURE CONFIGURATION | DUAL-IN-LINE |
INCLOSURE MATERIAL | CERAMIC AND GLASS |
INPUT CIRCUIT PATTERN | 7 INPUT |
OPERATING TEMP RANGE | -30.0 TO 75.0 CELSIUS |
OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
MAXIMUM POWER DISSIPATION RATING | 320.0 MILLIWATTS |
STORAGE TEMP RANGE | -55.0 TO 125.0 CELSIUS |
TERMINAL SURFACE TREATMENT | SOLDER |
TERMINAL TYPE AND QUANTITY | 14 PRINTED CIRCUIT |
TEST DATA DOCUMENT | 01534-37270043 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
TIME RATING PER CHACTERISTIC | 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.0 VOLTS MINIMUM POWER SOURCE AND 18.0 VOLTS MAXIMUM POWER SOURCE |