| DESIGN FUNCTION AND QUANTITY | 1 GATE, ARRAY |
| FEATURES PROVIDED | ELECTROSTATIC SENSITIVE AND BURN IN |
| INCLOSURE CONFIGURATION | LEADED CHIP CARRIER |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | ECL/TTL GATE ARRAY BUS INFERFACE AND CONTROL |
| MAXIMUM POWER DISSIPATION RATING | 24.01 WATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | EMITTER-COUPLED LOGIC AND TRANSISTOR-TRANSISTOR LOGIC |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 224 FLAT LEADS |
| TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -8.0 VOLTS MINIMUM POWER SOURCE AND 7.0 VOLTS MAXIMUM POWER SOURCE |